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F1E21 databook confidential / preliminary documentation revision 1.0 copyright c 2006 f1bt corp.
list of contents 1 general 1.1 overview 1.2 features 1.3 application 1.4 pinout diagram & outline size 1.5 device terminal descriptions 1.6 package dimensions 2 characteristics 2.1 electrical characteristics 2.2 radio characteristics 3 terminal description 3.1 uart 3.1.1 uart setting 3.1.2 uart bypass mode 3.2 usb 3.3 i2c 3.4 audio pcm interface 3.4.1 pcm configuration 4 boot interface configures 5 application schematic 6 revision history
1. general 1.1 overview this specification covers bluetooth module (class-2) wh ich complies with bluetooth specification version 2.0 + edr and integrates rf & baseband controller in small package. this module has deployed csr?s bc04- external chipset. all detailed specification including pinouts and electr ical specification may be changed without notice.
1.2 features ? fully qualified bluetooth v2.0 + edr ? enhanced data rate (edr) compliant with v2.0.e.2 of specification for both 2mbps and 3mbps modulation modes ? full-speed bluetooth operation with full piconet support ? scatternet support ? low power consumption ? support for 802.11 co-existence ? rohs compliant ? usb and dual uart ports ? competitive size (11mm x 11mm x 1.56mm : qfn 36pin) 1.3 application ? notebook pc, desktop pc ? pda ? cordless headset ? digital camera & printer ? gps,pos, barcode reader ? domestic and industrial applications ? access point ? serial adapter
1.4 pinout diagram & outline size
1.5 device terminal functions pin name description pcm pcm out pcm in pcm clk pcm sync 12 21 16 22 synchronous data output synchronous data input synchronous data clock synchronous data sync uart txd rxd cts rts 13 17 20 14 uart data output, active low uart data input, active low (idle status high) usb usb - usb + 19 18 usb - usb + with selectable internal 1.5k pull-up resistor pio & aio pio0 pio1 pio2 pio3 pio4 pio5 pio6 pio7 pio8 pio9 pio10 pio11 aio0 aio1 35 34 6 9 24 30 23 15 33 32 1 2 8 7 programmable input/output line pio 4,5,6,7 can be used uart bypass mode pio 6,7,8 can be used to form i2c interface spi spi mosi spi clk spi miso spi csb 25 27 29 26 serial peripheral interface data input serial peripheral interface clock serial peripheral interface data output chip select for synchronous spi active low other pins ant gnd 3v resetb 4 3,5,11,31,36 10 28 rf connection to antenna ground main supply input voltage. reset if low. input debounced so must be low for >5ms to cause a reset
1.6 module dimension
2. characteristics 2.1 electrical characteristics absolute maximum ratings rating minimum maximun storage temperature -40c 85c supply voltage : vcc -0.4v 3.7v other terminal voltages vss-0.4v vcc+0.4v recommended operating conditions operating condition minimum maximun operating temperature range -30c 70c supply voltage : vcc 1.7v 3.6v
2.2 rf characteristics transmitter specification condition min typ max unit output transmit power normal -6 1 4 dbm transmit power density normal 4 dbm transmit power control normal 2 8 dbm frequency range normal 2400 2483.5 mhz 20db bandwidth for modulated carrier normal 850 1000 khz adjacent channel transmit power 2mhz 3mhz 4mhz -20 -40 -40 dbm modulation characteristics f1avg f2max f2avg / f1avg 140 115 175 80 khz khz % initial carrier frequency tolerance normal -20 20 khz carrier frequency drift one slot packet(dh1) three slot packet(dh3) five slot packet(dh5) -25 -40 -40 25 40 40 khz transceiver specification condition min typ max unit adjacent channel transmit power 30mhz ~ 1ghz 1ghz ~12.75ghz 1.8ghz ~5.1ghz 5.1ghz ~5.3ghz -36 -30 -47 -47 dbm receiver specification condition min typ max unit sensitivity level (0.1% ber) single slot packets -70 -80 dbm transmit power density multi slot packet -70 -80 dbm c/i performance co-channel 1mhz (adjacent channel) 2mhz (2nd adjacent channel) 3mhz (3rd adjacent channel) 11 0 -30 -40 db blocking performance 30mhz ~ 2000mhz 2000mhz ~ 2400mhz 2500mhz ~ 3000mhz 3000mhz ~ 12.75ghz -10 -27 -27 -10 dbm intermodulation performance n=5 -39 dbm maximum input level -20 -10 dbm
3. terminal description 3.1 uart four signals are used to implement the uart function. uart_txd and uart_rxd transfer data between the two devices. 3.1.1 uart setting user can change data format t he following selection using pskey. however, host shall communicate with default setting uart connection initiated at first time. baud rate = (pskey_uart_baud_rate) / 0.004096 parameter possible value baud rate 9600 ~ 3m baud flow control none parity none, odd or even number of stop bits 1 or 2 bits per channel 8 3.1.2 uart bypass mode in order to apply the uart bypass mode, a bccmd command will be issued to F1E21 upon this , it will switch the bypass to pio4,5,6,7 as shown in figur e. when the bypass mode has been invoked, module enters the deep sleep state indefinitely
3.2 usb bluecore4 - external devices contain a full speed (12mbits /s) usb interface that is capable of driving a usb cable directly. no external usb transceiver is required. the device operates as a usb peripheral, responding to requests from a master host controller such as a pc. both the ohci and the uhci standards are supported. the set of usb endpoints implemented can behave as specified in the usb section of the bluetooth specification v1.2 or alternatively can app ear as a set of endpoints appropriate to usb audio devices such as speakers. as usb is a master/slave oriented system (in comm on with other usb peripherals), bluecore3-multimedia external only supports usb slave operation. 3.3 i2c pio[8:6] can be used to form an interface. the interf ace is driven by ?bit banging? these pio pins using software. therefore it is suited only to relatively slow functions such as driving a dot matrix liquid crystal display (lcd). note. pio[7:6] dual functions, uart bypass and eeprom support, t herefore devices using an eeprom connect support uart bypass mode. pio lines need to be pulled-up through 2.2k
3.4 pcm pulse code modulation (pcm) is a standard method used to digitize audio (particularly voice) patterns for transmission over digital communication channels. thro ugh its pcm interface, this module has hardware support for continual transmission and reception of pc m data, so reducing processor overhead for wireless headset applications. this module offers a bi-directional digital audio interface that route directly into the baseband lauer of the on-chip firmware. it dose not pass through the hci protocol layer. hardware allows the data to be sent to and received fr om a sco connection. this module interfaces directly to pcm audio devices including the following: - qualcomm msm 3000 series and msm 5000 series cdma baseband devices - oki msm7705 for channel a-law and u-law codec - motorola mc145481 8-bit a-law and u-law codec - motorola mc145483 13-bit linear codec - stw 5093 and 5094 14-bit linear codecs 3.4.1 pcm configuration the pcm configuration is set using two ps keys, pskey_pcm_config32 and pskey_pcm_low_jitter_config. the default for long frame sync and in terface master generating 256khz pcm_clk with no tri-state of pcm_out. parameter possible value mode slave, master clock rate master mode : 128, 256, 512khz slave mode : up to 2048khz sync formats long frame sync, short frame sync data formats 13 or 16bit linear, 8-bit a-law to u-law
4. revision history revision date change descriptions issued by rev 1.0 2006-12-21 initial release narsen
5. application schematic 2layer 0.8t pcb : trance width = 1.45mm *microstrip line recommend 4layer 0.8t pcb : trance width = 0.34mm (1~2layer copper thickness = 0.2mm) c2 3u3/16v 1 pio[10] 2 pio[11] 3 gnd 4 ant 5 gnd 6 pio[2] 7 aio[1] 8 aio[0] 9 pio[3] 27 spi_clk 26 spi_csb 25 spi_mosi 24 pio[4] 23 pio[6] 22 pcm_sync 21 pcm_in 20 uart_cts 19 usb_dn 28 resetb 29 spi_miso 30 pio[5] 31 gnd 32 pio[9] 33 pio[8] 34 pio[1] 35 pio[0] 36 gnd 18 usb_dp 17 uatr_rx 16 pcm_clk 15 pio[7] 14 uart_rts 13 uart_tx 12 pcm_out 11 gnd 10 3v u1 F1E21_rev_a1 c6 nc l2 0 ohm c9 nc 1 rf 2 gnd 3 gnd 4 gnd 5 gnd ant c1 0.1uf r1 100k uart_txd uart_rts uart_rxd uart_cts tp tp tp tp vcc vcc

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